PSD412A2 데이터 시트보기 (PDF) - STMicroelectronics

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PSD412A2

Low Cost Field Programmable Microcontroller Peripherals

STMicroelectronics 

PSD4XX Family

8.0

Table 2.

PSD4XX Pin

Descriptions

8

The following table describes the pin names and pin functions of the PSD4XX. Pins that

have multiple names and/or functions are defined by user configuration.

Pin Name

Pin Function

Type

Function Descriptions

ADIO0 – ADIO15 Address/data bus I/O

RD

WR

CSI

RESET

CLKIN

Multiple Names

I

1. Read

2. E

3. DS

4. LDS

Multiple Names

I

1. WR

2. R/W

3. WRL

Chip Select Input

I

Reset Input

I

Input clock

I

PA0 – PA7

I/O Port A

I/O

PB0 – PB7

I/O Port B

I/O

PC0 – PC7

I/O Port C

I/O

CMOS

or

OD

PD0 – PD7

I/O Port D

I/O

CMOS

or

OD

*Available only in PSD4XXA2 and ZPSD4XXA2 Series.

1. Address/data bus, multiplexed

bus mode

2. Address bus, non-multiplexed

bus mode

Multiple functions

1. Read signal

2. E signal (Clock)

3. Data strobe signal

4. Low byte data strobe

Multiple functions

1. Write signal

2. Read-write signal

3. Low byte write signal

Active low, select PSD4XX

standby mode if high.

Reset I/O ports, ZPLD/macrocells,

and Configuration Registers.

Active low.

Clock input to ZPLD macrocells,

ZPLD Array and APD counter.

Connect to ground if Clock Input

not used.

Multiple functions

1. I/O port

2. ZPLD/macrocell I/O port

3. Latched address outputs

(PA0 – PA7) → (A0 – A7)

4. High address inputs (A16 – A23)

Multiple functions

1. I/O port

2. ZPLD/macrocell I/O port

3. Latched address outputs

(PB0–PB7) → (A0–A7) or (A8–A15)

Multiple functions

1. I/O port

2. ZPLD input port*

3. Latched address outputs

(PC0 – PC7) → (A0–A7)

4. Data Port (D0 – D7,

non-multiplexed bus)

Multiple functions

1. I/O port

2. ZPLD input port*

3. Latched address outputs

(PD0–PD7) → (A0–A7) or (A8–A15)

4. Data Port (D8 –D15,

non-multiplexed bus)

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