HI1-0539-5 데이터 시트보기 (PDF) - Intersil

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HI1-0539-5

Precision, 4-Channel, Low-Level, Differential Multiplexer

Intersil 

HI-539

WIRE GAGE

EQUIVALENT WIDTH OF

P.C. CONDUCTOR

(2 oz. Cu)

18

0.47”

20

0.30”

22

0.19”

24

0.12”

26

0.075”

28

0.047”

30

0.029”

32

0.018”

TABLE 1.

DC RESISTANCE

PER FOOT

0.0064Ω

0.0102Ω

0.0161Ω

0.0257Ω

0.041Ω

0.066Ω

0.105Ω

0.168Ω

INDUCTANCE PER

FOOT

0.36µH

0.37µH

0.37µH

0.40µH

0.42µH

0.45µH

0.49µH

0.53µH

IMPEDANCE PER FOOT

60Hz

0.0064Ω

0.0102Ω

0.0161Ω

0.0257Ω

0.041Ω

0.066Ω

0.105Ω

0.168Ω

10kHz

0.0235Ω

0.0254Ω

0.0288Ω

0.0345Ω

0.0488Ω

0.0718Ω

0.110Ω

0.171Ω

Provide Path For IBIAS

The input bias current for any DC-coupled amplifier must

have an external path back to the amplifier’s power supply.

No such path exists in Figure 8A, and consequently the

amplifier output will remain in saturation.

A single large resistor (1MΩ to 10MΩ) from either signal line

to power supply common will provide the required path, but a

resistor on each line is necessary to preserve accuracy. A

single pair of these bias current resistors on the HI-539

output may be used if their loading effect can be tolerated

(each forms a voltage divider with rON). Otherwise, a resistor

pair on each input channel of the multiplexer is required.

The use of bias current resistors is acceptable only if one is

confident that the sum of signal plus common-mode voltage

will remain within the input range of the multiplexer/amplifier

combination.

Another solution is to simply run a third wire from the low

side of the signal source, as in Figure 8B. This wire assures

a low common-mode voltage as well as providing the path

for bias currents. Making the connection near the multiplexer

will save wire, but it will also unbalance the line and reduce

the amplifier's common-mode rejection.

Differential Offset, ∆VOS

There are two major sources of ∆VOS. That part due to the

expression (rON ∆lD(ON) + lD(ON) ∆rON) becomes significant

with increasing temperature, as shown in the Electrical

Specifications tables. The other source of offset is the

thermocouple effects due to dissimilar materials in the signal

path. These include silicon, aluminum, tin, nickel-iron and

(often) gold, just to exit the package.

For the thermocouple effects in the package alone, the

constraint on ∆VOS may be stated in terms of a limit on the

difference in temperature for package pins leading to any

channel of the Hl-539. For example, a difference of 0.13oC

produces a 5µV offset. Obviously, this ∆T effect can

dominate the ∆VOS parameter at any temperature unless

care is taken in mounting the Hl-539 package.

Temperature gradients across the Hl-539 package should be

held to a minimum in critical applications. Locate the Hl-539

far from heat producing components, with any air currents

flowing lengthwise across the package.

9

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