CXG1053FN 데이터 시트보기 (PDF) - Sony Semiconductor
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CXG1053FN
Sony Semiconductor
CXG1053FN Datasheet PDF : 8 Pages
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CXG1053FN
3. Antenna Switch Receiver Block + Front-end Block
These specifications are when the Sony's recommended evaluation board with the external circuit shown on
page 7 is used. Therefore, the antenna switch reception pin (Rx) and the low noise amplifier input pin
(RFIN_LNA) are connected via an external circuit. The specifications of the low noise amplifier block are set
including the antenna switch reception block.
(a) Antenna switch receiver block + low noise amplifier block
Unless otherwise specified: VDD = 3V, VCTL1 = 0V, VCTL2 = 3V, RF = 1.9GHz/–30dBm, Ta = 25°C
Item
Symbol Measurement conditions Min. Typ. Max. Unit
Current consumption
IDD_LNA
When no signal
2.5 3.5 mA
Power gain
GP
12.5 14.5 16.5 dB
Noise figure
NF
Input IP3
IIP3
2.7 3.5 dB
∗1
–11 –8
dBm
Isolation
ISO
25
30
dB
∗1 Conversion from IM3 compression ratio during FR1 = 1.9000GHz/–30dBm and FR2 = 1.9006GHz/–30dBm
input.
(b) Mixer Block
Unless otherwise specified: VDD = 3V, RF = 1.90GHz/–25dBm, LO = 1.66GHz/–12dBm, Ta = 25°C
Item
Symbol Measurement conditions Min. Typ. Max. Unit
LO block current consumption IDD_LO
When no signal
1.7 2.5 mA
IF block current consumption IDD_IF
When no signal
3.3 4.5 mA
Conversion gain
GC
7
9
11 dB
Noise figure
NF
Input IP3
IIP3
LO to ANT leak
PLK
8.5 11.5 dB
∗2
–2
+1
dBm
∗3
–43 –38 dBm
∗2 Conversion from IM3 compression ratio during FR1 = 1.9000GHz/–25dBm and FR2 = 1.9006GHz/–25dBm
input.
∗3 The RFOUT pin of the LNA and the RFIN pin of the MIX block is connected directly with the cable.
And the power supply of the LNA is turned on.
(c) Total of (a) + (b)
Item
Current consumption
Symbol Measurement conditions Min. Typ. Max. Unit
IDD_total
When no signal
7.5
10 mA
–4–
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