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PI6CV857A

PLL Clock Driver for 2.5V DDR-SDRAM Memory

Pericom Semiconductor 

PI6CV857

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Yx, FBOUT

Yx, FBOUT

Yx, FBOUT

Yx, FBOUT

tcycle n

1

fO

t jit(per) = t cycle n

1

fO

Figure 6. Period Jitter

Yx, FBOUT

Yx, FBOUT

thalf period n

1

fO

t n+1

half period

t jit(hper) = t half period n

1

2*fO

Figure 7. Half-Period Jitter

80%

20%

Clock Inputs

and Outputs

t sl(i), t sl(o)

t sl(i), t sl(o)

80%

V ID

20%

Figure 8. Input and Output Slew Rates

8

PS8464B 11/10/00

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