PI6CV857A 데이터 시트보기 (PDF) - Pericom Semiconductor
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PI6CV857A Datasheet PDF : 9 Pages
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PI6CV857
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AC Specifications
Switching characteristics over recommended operating free-air temperature range (unless otherwise noted)
Parameter
Description
Diagram
AVCC, VDDQ = 2.5V ±0.2V
Min.
Nom.
Max
tjit(cc)
t(θ)
Cycle-to-cycle jitter
Static phase offset(1)
see Figure 3
75
75
see Figure 4
80
0
80
tsk(o)
Output clock skew
see Figure 5
100
tjit(per)
Period jitter
see Figure 6
75
75
tjit(hper)
Half-period jitter
see Figure 7
100
100
tsl(i)
Input clock slew rate(2)
see Figure 8
1.0
2.0
tsl(o)
Output clock slew rate(2)
see Figure 8
1.0
2.0
Units
ps
V/ns
The PLL on the PI6CV857 is capable of meeting all the above parameters while supporting SSC synthesizers
with the following parameters(3).
SSC modulation frequency
30.00
SSC clock input frequency deviation
0.00
PLL loop bandwidth
2
Phase angle
Notes:
1. Static Phase offset does not include Jitter.
2. The slew rate is determined from the IBIS model and not from the test load.
3. The SSC requirements meet the Intel PC100 SDRAM Registered DIMM specification.
50.00
0.50
0.031
kHz
%
MHz
degrees
5
PS8464B 11/10/00
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