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MC74HCT244AH Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MC74HCT244A
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC74HCT244A is identical in pinout to the LS244. This
device may be used as a level converter for interfacing TTL or NMOS
outputs to High–Speed CMOS inputs. The HCT244A is an octal
noninverting buffer line driver line receiver designed to be used with
3–state memory address drivers, clock drivers, and other bus–oriented
systems. The device has non–inverted outputs and two active–low
output enables.
The HCT244A is the noninverting version of the HCT240. See also
HCT241.
Output Drive Capability: 15 LSTTL Loads
TTL NMOS–Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1 µA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 112 FETs or 28 Equivalent Gates
LOGIC DIAGRAM
A1 2
18 YA1
A2 4
16 YA2
A3 6
14 YA3
A4 8
DATA INPUTS
B1 11
12 YA4
9 YB1
NONINVERTING
OUTPUTS
B2 13
7 YB2
B3 15
5 YB3
B4 17
3 YB4
http://onsemi.com
20
1
20
1
PDIP–20
N SUFFIX
CASE 738
SOIC WIDE–20
DW SUFFIX
CASE 751D
MARKING
DIAGRAMS
20
MC74HCT244AN
AWLYYWW
1
20
HCT244A
AWLYYWW
1 20
20
1
TSSOP–20
DT SUFFIX
CASE 948E
HCT
244A
ALYW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
A2 4
YB3 5
A3 6
YB2 7
A4 8
YB1 9
GND 10
20 VCC
19 ENABLE B
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
OUTPUT ENABLE A 1
ENABLES ENABLE B 19
PIN 20 = VCC
PIN 10 = GND
FUNCTION TABLE
Inputs
Outputs
Enable A,
Enable B A, B YA, YB
L
L
L
L
H
H
H
X
Z
Z = high impedance, X = don’t care
ORDERING INFORMATION
Device
Package Shipping
MC74HCT244AN
PDIP–20 1440 / Box
MC74HCT244ADW SOIC–WIDE 38 / Rail
MC74HCT244ADWR2 SOIC–WIDE 1000 / Reel
MC74HCT244ADT
TSSOP–20 75 / Rail
MC74HCT244ADTR2 TSSOP–20 2500 / Reel
© Semiconductor Components Industries, LLC, 2000
1
May, 2000 – Rev. 9
Publication Order Number:
MC74HCT244A/D

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