AT43101 데이터 시트보기 (PDF) - Atmel Corporation
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AT43101
Atmel Corporation
AT43101 Datasheet PDF : 14 Pages
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AT43101
Memory Access Functions
Mode
REG*
Standby
X
Byte Read, Even
H or L
Byte Read, Odd
H only
Word Read
H only
Odd byte only Read
H only
Byte Write, Even
H or L
Byte Wrtite, Odd
H only
Word Write
H only
Odd byte only Write
H only
CE2*
H
H
H
L
L
H
H
L
L
CE1*
H
L
L
L
H
L
L
L
H
The E2PROM includes address and data latches which are
clocked at the leading edge of the effective write pulse that
results from the gating of the PCMCIA control signals. The
Tsu(CE), Tsu(REG), Tsu(WE) timing parameters shown in
the AC Write Characteristics guarantee adequate pulse
width for the latch clock signals. The actual write is trig-
A0
OE*
WE* D[15:8] D[7:0]
X
X
X
High Z High Z
L
L
H
High Z D(Even)
H
L
H
High Z D(Odd)
X
L
H
D(Odd) D(Even)
X
L
H
D(Odd) High Z
L
H
L
X
D(Even)
H
H
L
X
D(Odd)
X
H
L
D(Odd) D(Even)
X
H
L
D(Odd)
X
gered by the rising edge of the first of WE* or CE1* to go
high. Writes to the E2PROM Attribute Memory must
observe either a 10 ms. write recovery/cycle time or wait
until R/B* goes inactive before another write can be initiated.
7
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