DS1212 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS1212 Datasheet PDF : 7 Pages
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TYPICAL APPLICATION Figure 2
DS1212
OUTPUT LOAD Figure 3
NOTES:
1. All voltages referenced to ground.
2. Only one battery input is required.
3. Measured with VCCO and CE0 - CE15 open.
4. ICC01 is the maximum average load which the DS1212 can supply to the memories.
5. Measured with a load as shown in Figure 3.
6. ICC02 is the maximum average load current which the DS1212 can supply to the memories in the battery backup
mode.
7. Chip enable outputs CE0 - CE15 can only sustain leakage current in the battery backup mode.
8. tCE max. must be met to ensure data integrity on power loss.
9. tAS is only required to keep the decoder outputs glitch-free. While CE is low, the outputs ( CE0 - CE15 ) will be
defined by inputs A through D with a propagation delay of tPD from an A through D input change.
10. For applications where higher currents are required, please see the Battery Manager chip data sheet (DS1259).
11. The DS1212 has a 5 kohm resistor in series with the battery input. As current from the battery increases over
100 µA, the voltage drop will increase proportionately. The device cannot be damaged by higher currents in the
battery path.
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