MITSUBISHI 〈DIGITAL ASSP〉
M66252P/FP
TIMING CHARTS
• Write Cycles
Cycle n Cycle(n+1) Cycle(n+2)
WCK
tWCK
tWCKH tWCKL tWEH tNSES
1152 x 8-BIT LINE MEMORY (FIFO)
Disable cycles
Cycle(n+3) Cycle(n+4)
tNWEH tWES
WE
tDS tDH
tDS tDH
Dn
(n)
(n+1)
(n+2)
(n+3)
(n+4)
WRES=“H”
• Write Reset Cycles
WCK
Cycle(n–1) Cycle n
tWCK tNRESH tRESS
Reset cycles
Cycle 0
Cycle 1
Cycle 2
tRESH tNRESS
WRES
Dn
tDS tDH
tDS tDH
(n –1)
(n)
(0)
(1)
(2)
WE=“L”
5