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T8531A

Multichannel Programmable Codec Chip Set

Agere -> LSI Corporation 

T8531A/T8532 Multichannel Programmable

Codec Chip Set

Preliminary Data Sheet

September 2001

General Description (continued)

T8532 Description

The T8532 block diagram is shown in Figure 2. Each of its eight channels consists of an antialias filter, sigma-delta

A/D and D/A converters, reconstruction and smoothing filters, termination impedance synthesis, and selectable

gain. The digital oversampled data is multiplexed onto a serial data port designed to interface with the T8531A

Another serial interface accepts control data from the T8531A for activating the various gain settings, self-test, and

powerdown modes. This chip also contains a precision voltage reference.

VTX[7:0]

VRTX[7:0]

VRP[7:0]

VRN[7:0]

VDDA

VSSA

VDD

VSS

8-CHANNEL

A/D D/A

ANALOG HYBRID

&

TERMINATION

VOLTAGE

REFERENCE

OVERSAMPLED

DATA

INTERFACE

CONTROL

INTERFACE

OSDX[1:0]

OSDR[1:0]

OSCK

OSFS

CDO

CDI

CCS

RSTB

Figure 2. Block Diagram of T8532 Octal Converter

5-3794.b (F)

DIGITAL LOOPBACK

VTX

VRTX

GAIN

AT

GAIN

AAF*

∑-∆

A/D

1.024 MHz

V REFERENCES

VRP

VRN

* Antialiasing filter.

4

SUM

GAIN

RECEIVE

FILTER

1.024 MHz

D/A

Figure 3. Block Diagram of One T8532 Analog Channel

5-3796.d (F)

Agere Systems Inc.

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