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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

MBF110PFWSTES 데이터 시트보기 (PDF) - Fujitsu

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MBF110PFWSTES
Fujitsu
Fujitsu Fujitsu
MBF110PFWSTES Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Solid-State Fingerprint Sensor
Function Table
CE1
CE2
RD
WR
H
X
X
X
X
L
X
X
L
H
H
H
L
H
L
H
L
H
H
L
Mode
De-selected
De-selected
Standby
Read
Write
Data Lines
High-Z
High-Z
High-Z
Data Out
Data In
Register Map
A3
A2
A1
A0
Access
Register
Description
0
0
0
0
Write
RAL
Low Order Row Address Register
0
0
0
1
Write
RAH
High Order Row Address Register
0
0
1
0
Read/Write
CAL
Low Order Column Address Register
0
0
1
1
Write
CAH
High Order Column Address Register
0
1
0
0
Write
0
1
0
1
Write
y 0
1
1
0
Write
DTR
Discharge Time Register
DCR
Discharge Current Register
RSR
Reserved
Address Register Descriptions inar Refer to Row Capture andA/D ConversionTiming on page 9 to
calculate row capture and A/D conversion times.
lim RAL (A3-A0 Address 0000) Write Only
e MSB
Pr BIT7
BIT6
BIT5
BIT4
Low Order Row Address Register
This register and bit 0 of RAH form the 9-bit Row Address Register
that selects the row to be captured. The 9-bit Row Address Register
selects a row address from 0 through 299. Writing the RAL starts a
row capture. Only RAL has to be written if RAH doesn’t change,
otherwise RAH has to be written before RAL.
BIT3
BIT2
BIT1
LSB
BIT0
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0
Bit Number
[7:0]
Bit Name
RA[7:0]
Function
Low eight bits of Row Address Register.
4 Fujitsu Microelectronics, Inc.

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