LT3971AIMSE-TRPBF 데이터 시트보기 (PDF) - Linear Technology

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LT3971AIMSE-TRPBF

38V, 1.3A, 2MHz Step-Down Regulator with 2.2µA Quiescent Current

Linear Technology 

LT3971A/LT3971A-5

PIN FUNCTIONS

BD (Pin 1): This pin connects to the anode of the boost

diode. The BD pin is normally connected to the output.

BOOST (Pin 2): This pin is used to provide a drive volt-

age, higher than the input voltage, to the internal bipolar

NPN power switch.

SW (Pin 3): The SW pin is the output of an internal power

switch. Connect this pin to the inductor, catch diode, and

boost capacitor.

VIN (Pin 4): The VIN pin supplies current to the LT3971A’s

internal circuitry and to the internal power switch. This

pin must be locally bypassed.

EN (Pin 5): The part is in shutdown when this pin is low

and active when this pin is high. The hysteretic threshold

voltage is 1.005V going up and 0.975V going down. The EN

threshold is only accurate when VIN is above 4.3V. If VIN is

lower than 4.2V, ground EN to place the part in shutdown.

Tie to VIN if shutdown feature is not used.

FB (Pin 6, LT3971A Only): The LT3971A regulates the FB

pin to 1.19V. Connect the feedback resistor divider tap to

this pin. Also, connect a phase lead capacitor between FB

and VOUT. Typically this capacitor is 10pF.

VOUT (Pin 6, LT3971A-5 Only): The LT3971A-5 regulates

the VOUT pin to 5V. This pin connects to the internal 10MΩ

feedback divider that programs the fixed output voltage.

SS (Pin 7): A capacitor is tied between SS and ground to

slowly ramp up the peak current limit of the LT3971A on

start-up. The soft-start capacitor is only actively discharged

when EN is low. The SS pin is released when the EN pin

goes high. Float this pin to disable soft-start. For applica-

tions with input voltages above 25V, add a 100k resistor

in series with the soft-start capacitor.

RT (Pin 8): A resistor is tied between RT and ground to

set the switching frequency.

PG (Pin 9): The PG pin is the open-drain output of an

internal comparator. PGOOD remains low until the FB pin

is within 9% of the final regulation voltage. PGOOD is

valid when the LT3971A is enabled and VIN is above 4.3V.

SYNC (Pin 10): This is the external clock synchronization

input. Ground this pin for low ripple Burst Mode operation

at low output loads. Tie to a clock source for synchroni-

zation, which will include pulse-skipping at low output

loads. When in pulse-skipping mode, quiescent current

increases to 1.5mA.

GND (Exposed Pad Pin 11): Ground. The exposed pad

must be soldered to PCB.

3971af

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