U631H16 데이터 시트보기 (PDF) - Zentrum Mikroelektronik Dresden AG
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U631H16 Datasheet PDF : 12 Pages
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Nonvolatile Memory Operations
No.
STORE Cycle Inhibit and
Automatic Power Up RECALL
Symbol
Alt.
IEC
24 Power Up RECALL Durationk, e
tRESTORE
Low Voltage Trigger Level
VSWITCH
k: tRESTORE starts from the time VCC rises above VSWITCH.
STORE Cycle Inhibit and Automatic Power Up RECALL
VCC
5.0 V
VSWITCH
Min.
4.0
U631H16
Max.
650
4.5
Unit
µs
V
Power Up
RECALL
Software Mode Selection
(24)
tRESTORE
t
STORE inhibit
E
W
A10 - A0
(hex)
Mode
I/O
L
H
000
Read SRAM
Output Data
555
Read SRAM
Output Data
2AA
Read SRAM
Output Data
7FF
Read SRAM
Output Data
0F0
Read SRAM
Output Data
70F
Nonvolatile STORE
Output High Z
L
H
000
Read SRAM
Output Data
555
Read SRAM
Output Data
2AA
Read SRAM
Output Data
7FF
Read SRAM
Output Data
0F0
Read SRAM
Output Data
70E
Nonvolatile RECALL
Output High Z
Power
Active
ICC2
Active
Notes
l, m
l, m
l, m
l, m
l, m
l
l, m
l, m
l, m
l, m
l, m
l
l: The six consecutive addresses must be in order listed (000, 555, 2AA, 7FF, 0F0, 70F) for a Store cycle or (000, 555, 2AA,
7FF, 0F0, 70E) for a RECALL cycle. W must be high during all six consecutive cycles. See STORE cycle and RECALL cycle tables and
diagrams for further details.
The following six-address sequence is used for testing purposes and should not be used: 000, 555, 2AA, 7FF, 0F0, 39C.
m: I/O state assumes that G ≤ VIL. Activation of nonvolatile cycles does not depend on the state of G.
August 13, 2003
7
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