W83877TF(1998) 데이터 시트보기 (PDF) - Winbond

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W83877TF
(Rev.:1998)

WINBOND I/O

Winbond 

W83877TF

3.2.1 UART Control Register (UCR) (Read/Write)

The UART Control Register controls and defines the protocol for asynchronous data communications,

including data length, stop bit, parity, and baud rate selection.

7 6 54 3 2 1 0

Data length select bit 0 (DLS0)

Data length select bit 1(DLS1)

Multiple stop bits enable (MSBE)

Parity bit enable (PBE)

Even parity enable (EPE)

Parity bit fixed enable (PBFE)

Set silence enable (SSE)

Baudrate divisor latch access bit (BDLAB)

Bit 7: BDLAB. When this bit is set to a logical 1, designers can access the divisor (in 16-bit binary

format) from the divisor latches of the baud rate generator during a read or write operation.

When this bit is reset, the Receiver Buffer Register, the Transmitter Buffer Register, or the

Interrupt Control Register can be accessed.

Bit 6: SSE. A logical 1 forces the Serial Output (SOUT) to a silent state (a logical 0). Only SOUT is

affected by this bit; the transmitter is not affected.

Bit 5: PBFE. When PBE and PBFE of UCR are both set to a logical 1,

(1) if EPE is a logical 1, the parity bit is fixed as a logical 0 to transmit and check.

(2) if EPE is a logical 0, the parity bit is fixed as a logical 1 to transmit and check.

Bit 4: EPE. This bit describes the number of logic 1's in the data word bits and parity bit only when bit

3 is programmed. When this bit is set, an even number of logic 1's are sent or checked. When

the bit is reset, an odd number of logic 1's are sent or checked.

Bit 3: PBE. When this bit is set, the position between the last data bit and the stop bit of the SOUT

will be stuffed with the parity bit at the transmitter. For the receiver, the parity bit in the same

position as the transmitter will be detected.

Bit 2: MSBE. This bit defines the number of stop bits in each serial character that is transmitted or

received.

(1) If MSBE is set to a logical 0, one stop bit is sent and checked.

(2) If MSBE is set to a logical 1, and data length is 5 bits, one and a half stop bits are sent and

checked.

(3) If MSBE is set to a logical 1, and data length is 6, 7, or 8 bits, two stop bits are sent and

checked.

Bits 0 and 1: DLS0, DLS1. These two bits define the number of data bits that are sent or checked in

each serial character.

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Publication Release Date: March 1998

Version 0.61

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