74HC14 데이터 시트보기 (PDF) - Unspecified
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74HC14 Datasheet PDF : 5 Pages
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High Speed CMOS Logic – 74HC14
d
Pad Layout and Functions
Rev 1.0
24/11/17
13
12
11
10
9
14
DIE ID
8
7
1
2
3
4
5
6
0,0
1250µm (49.21 mils)
Logic Diagram
Y=Ᾱ
PAD
FUNCTION
COORDINATES (mm)
X
Y
1
1A
0.14
0.345
2
1Y
0.14
0.141
3
2A
0.319
0.141
4
2Y
0.577
0.141
5
3A
0.817
0.141
6
3Y
1.019
0.141
7
GND
1.036
0.47
8
4Y
1.036
0.749
9
4A
1.006
1.007
10
5Y
0.8
1.007
11
5A
0.584
1.007
12
6Y
0.334
1.007
13
6A
0.141
0.969
14
VCC
0.14
0.663
CONNECT CHIP BACK TO VCC OR FLOAT
Function Table
INPUTS
A
OUTPUT
Y
L
H
H
L
H = High level (steady state)
L = Low level (steady state)
Page 2 of 5
Pad 14 = VCC
Pad 7 = GND
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