MPC8309VMAHFCA 데이터 시트보기 (PDF) - Freescale Semiconductor

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MPC8309VMAHFCA

PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications

Freescale Semiconductor 

Electrical characteristics

2.1.2 Power supply voltage specification

The following table provides the recommended operating conditions for the MPC8309. Note that these

values are the recommended and tested operating conditions. Proper device operation outside of these

conditions is not guaranteed.

Table 2. Recommended operating conditions

Characteristic

Symbol

Recommended

Value

Unit

Note

Core supply voltage

VDD

1.0 V ± 50 mV

V

1

PLL supply voltage

AVDD1

1.0 V ± 50 mV

V

1

AVDD2

AVDD3

DDR2 DRAM I/O voltage

GVDD

1.8 V ± 100 mV

V

1

PCI, Local bus, DUART, system control and power management,

OVDD

3.3 V ± 300 mV

V

1, 3

I2C, SPI, MII, RMII, MII management, eSDHC, FlexCAN,USB and

JTAG I/O voltage

Junction temperature

TA/TJ

0 to 105

°C

2

Notes:

1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative

direction.

2. Minimum temperature is specified with TA(Ambient Temperature); maximum temperature is specified with TJ(Junction

Temperature).

3. OVDD here refers to NVDDA, NVDDB, NVDDC, NVDDF, NVDDG, and NVDDH from the ball map.

The following figure shows the undershoot and overshoot voltages at the interfaces of the MPC8309

G/OVDD + 20%

G/OVDD + 5%

VIH

G/OVDD

GND

GND – 0.3 V

VIL

GND – 0.7 V

Not to Exceed 10%

Note:

of tinterface1

1. tinterface refers to the clock period associated with the bus clock interface.

Figure 2. Overshoot/Undershoot voltage for GVDD/OVDD

MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3

Freescale Semiconductor

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