HEF4067B 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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HEF4067B

16-channel analog multiplexer/demultiplexer

Nexperia B.V. All rights reserved 

Nexperia

HEF4067B

16-channel analog multiplexer/demultiplexer

38/6(

9,

*(1(5$725

9''

92

'87

57

9''

5/ 6

&/

RSHQ

DDJ

Test data is given in Table 10.

Definitions test circuit:

RT = termination resistance should be equal to output impedance Zo of the pulse generator

CL = load capacitance including jig and probe capacitance

RL = load resistor

S1 = test selection switch

Fig 12. Test circuit for measuring switching times

Table 10. Test data

Input

Yn, Z

An and E tr, tf

VDD or VSS VDD or VSS  20 ns

VM

0.5VDD

Load

CL

50 pF

RL

10 k

S1 position

tPHL[1]

tPLH

VDD or VSS VSS

tPZH, tPHZ tPZL, tPLZ other

VSS

VDD

VSS

[1] For Yn to Z or Z to Yn propagation delays use VSS. For An or to Yn or Z propagation delays use VDD.

HEF4067B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 8 — 18 April 2016

© Nexperia B.V. 2017. All rights reserved

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