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74AHCT594BQ

8-bit shift register with output register

Nexperia B.V. All rights reserved 

Nexperia

74AHC594; 74AHCT594

8-bit shift register with output register

7. Functional description

Table 3. Function table

H = HIGH voltage state; L = LOW voltage state; ↑ = LOW to HIGH transition; X = don’t care; NC = no change.

Input

Output

Function

SHCP STCP SHR STR DS Q7S Qn

X

X

L

X

X

L

NC a LOW-state on SHR only affects the shift register

X

X

X

L

X

NC L

a LOW-state on STR only affects the storage register

X

↑

L

H

X

L

L

empty shift register loaded into storage register

↑

X

H

X

H

Q6S NC logic HIGH level shifted into shift register stage 0. Contents of all

shift register stages shifted through, e.g. previous state of stage 6

(internal Q6S) appears on the serial output (Q7S).

X

↑

H

H

X

NC QnS contents of shift register stages (internal QnS) are transferred to

the storage register and parallel output stages

↑

↑

H

H

X

Q6S QnS contents of shift register shifted through; previous contents of the

shift register is transferred to the storage register and the parallel

output stages

SHCP

DS

STCP

SHR

STR

Q0

Q1

Q6

Q7

Q7S

Fig. 8. Timing diagram

mbc323

74AHC_AHCT594

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 25 June 2020

© Nexperia B.V. 2020. All rights reserved

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