Nexperia
74AHC594; 74AHCT594
8-bit shift register with output register
SHR input
SHCP input
VM
tW
trec
VM
tPHL
Q7S output
VM
Measurement points are given in Table 8.
mbc324
Fig. 13. Shift register reset pulse width, input to output propagation delay and recovery time
SHR input
STCP input
VM
tsu
VM
Qn outputs
VM
Measurement points are given in Table 8.
Fig. 14. Shift register reset to storage register clock set-up time
Table 8. Measurement points
Type
74AHC594
74AHCT594
Input
VM
0.5 x VCC
1.5 V
mbc326
Output
VM
0.5 x VCC
0.5 x VCC
74AHC_AHCT594
Product data sheet
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Rev. 3 — 25 June 2020
© Nexperia B.V. 2020. All rights reserved
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