CY62128EV30(2007) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY62128EV30 Datasheet PDF : 11 Pages
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CY62128EV30 MoBL®
Thermal Resistance
Parameter
Description
ΘJA Thermal Resistance
(Junction to Ambient)
ΘJC Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 3 x 4.5 inch,
two-layer printed circuit board
TSOP I
33.01
3.42
AC Test Loads and Waveforms
SOIC
48.67
25.86
STSOP
32.56
3.59
Unit
°C/W
°C/W
R1
VCC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
VCC
10%
90%
90%
10%
R2
GND
Rise Time = 1 V/ns
Fall Time = 1 V/ns
Equivalent to: THEVENIN EQUIVALENT
OUTPUT
RTH
V
Parameters
R1
R2
RTH
VTH
2.50V
3.0V
Unit
16667
1103
Ω
15385
1554
Ω
8000
645
Ω
1.20
1.75
V
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
VDR
ICCDR[7]
tCDR[8]
tR[9]
VCC for Data Retention
Data Retention Current
VCC = 1.5V,
CE1 > VCC − 0.2V or CE2 < 0.2V,
VIN > VCC − 0.2V or VIN < 0.2V
Chip Deselect to Data Retention
Time
Operation Recovery Time
Ind’l/Auto-A
Auto-E
Min Typ[3] Max Unit
1.5
V
3 µA
30 µA
0
ns
tRC
ns
Data Retention Waveform [10]
VCC
CE
VCC(min)
tCDR
DATA RETENTION MODE
VDR > 1.5V
VCC(min)
tR
Notes:
9. Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs.
10. CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH.
Document #: 38-05579 Rev. *C
Page 4 of 11
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