CY7C1412KV18(2011) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7C1412KV18 Datasheet PDF : 30 Pages
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CY7C1410KV18, CY7C1425KV18
CY7C1412KV18, CY7C1414KV18
Logic Block Diagram (CY7C1410KV18)
D[7:0]
8
A(20:0) 21
Address
Register
Write
Reg
Write
Reg
K
K
DOFF
VREF
WPS
NWS[1:0]
CLK
Gen.
Control
Logic
Read Data Reg.
16
8
8
Address
Register
21
A(20:0)
Control
Logic
RPS
C
C
Reg.
Reg. 8
Reg.
8
8
CQ
CQ
Q[7:0]
Logic Block Diagram (CY7C1425KV18)
D[8:0]
9
A(20:0) 21
Address
Register
Write
Reg
Write
Reg
K
K
DOFF
VREF
WPS
BWS[0]
CLK
Gen.
Control
Logic
Read Data Reg.
18
9
9
Address
Register
21
A(20:0)
Control
Logic
RPS
C
C
Reg.
Reg. 9
Reg.
9
9
CQ
CQ
Q[8:0]
Document Number: 001-57825 Rev. *C
Page 2 of 30
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