CY23S08(2004) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY23S08 Datasheet PDF : 8 Pages
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PRELIMINARY
CY23S08
Maximum Ratings
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Input Voltage (Except Ref)...............–0.5V to VDD + 0.5V
DC Input Voltage REF............................................–0.5 to 7V
Storage Temperature ................................. –65°C to +150°C
Max. Soldering Temperature (10 sec.) ....................... 260°C
Junction Temperature ................................................. 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ............................. >2000V
Operating Conditions for CY23S08SC-XX Commercial Temperature Devices[5]
Parameter
VDD
TA
CL
CIN
Description
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance, below 100 MHz
Load Capacitance, from 100 MHz to 133 MHz
Input Capacitance[6]
Min.
Max.
Unit
3.0
3.6
V
0
70
°C
30
pF
15
pF
7
pF
Electrical Characteristics for CY23S08SC-XX Commercial Temperature Devices
Parameter
VIL
VIH
IIL
IIH
VOL
VOH
IDD (PD mode)
IDD
Description
Test Conditions
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
VIN = 0V
Input HIGH Current
Output LOW Voltage[7]
Output HIGH Voltage[7]
VIN = VDD
IOL = 8 mA (–1, –2, –3, –4)
IOL = 12 mA (-1H, -2H)
IOH = –8 mA (–1, –2, –3, –4)
IOH = –12 mA (–1H, –2H)
Power-down Supply Current REF = 0 MHz
Supply Current
Unloaded outputs, 100-MHz REF,
Select inputs at VDD or GND
Unloaded outputs, 66-MHz REF
(–1,–2,–3,–4)
Unloaded outputs, 33-MHz REF
(–1,–2,–3,–4)
Min.
2.0
2.4
Max
0.8
50.0
100.0
0.4
12.0
45.0
70.0
(–1H, –2H)
32.0
18.0
Unit
V
V
µA
µA
V
V
µA
mA
mA
mA
mA
Switching Characteristics for CY23S08SC-XX Commercial Temperature Devices [8]
Parameter
Name
Test Conditions
Min. Typ. Max.
t1
Output Frequency
30-pF load, –1, –1H, –2, –3 devices
10
100
t1
Output Frequency
30-pF load, –4 devices
15
100
t1
Output Frequency
20-pF load, –1H device
10
133.3
t1
Output Frequency
15-pF load, –1, –2, –3, devices
10
140.0
t1
Output Frequency
15-pF load, –4 devices
15
140.0
Duty Cycle[7] = t2 ÷ t1
(–1,–2,–3,–4,–1H, -2H)
Measured at VDD/2, FOUT = 66.66 MHz
30-pF load
40.0 50.0 60.0
Duty Cycle[7] = t2 ÷ t1
(–1,–2,–3,–4,–1H, -2H)
Measured at VDD/2, FOUT <66.66 MHz
15-pf load
45.0 50.0 55.0
t3
Rise Time[7] (–1, –2, –3, –4) Measured between 0.8V and 2.0V, 30-pF load
2.20
t3
Rise Time[7] (–1, –2, –3, –4) Measured between 0.8V and 2.0V, 15-pF load
1.50
Notes:
5. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
6. Applies to both Ref Clock and FBK.
7. Parameter is guaranteed by design and characterization. Not 100% tested in production.
8. All parameters are specified with loaded outputs.
Unit
MHz
MHz
MHz
MHz
MHz
%
%
ns
ns
Document #: 38-07265 Rev. *D
Page 3 of 8
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