74HCT2G32DC-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74HCT2G32DC-Q100

Dual 2-input OR gate

Nexperia B.V. All rights reserved 

Nexperia

74HC2G32-Q100; 74HCT2G32-Q100

Dual 2-input OR gate

4. Marking

Table 2. Marking code

Type number

74HC2G32DP-Q100

74HCT2G32DP-Q100

74HC2G32DC-Q100

74HCT2G32DC-Q100

Marking code [1]

H32

T32

H32

T32

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

1 1A

2 1B

5 2A

6 2B

1Y 7

2Y 3

mna733

Fig. 1. Logic symbol

1

≥1

7

2

5

≥1

3

6

mna734

Fig. 2. IEC logic symbol

B

Y

A

mna166

Fig. 3. Logic diagram (one gate)

6. Pinning information

6.1. Pinning

74HC2G32-Q100

74HCT2G32-Q100

1A 1

1B 2

2Y 3

GND 4

8 VCC

7 1Y

6 2B

5 2A

aaa-009271

Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

1A, 2A

1, 5

1B, 2B

2, 6

GND

4

1Y, 2Y

7, 3

VCC

8

Description

data input

data input

ground (0 V)

data output

supply voltage

74HC_HCT2G32_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 8 February 2019

© Nexperia B.V. 2019. All rights reserved

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