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74HCT2G32DP-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74HCT2G32DP-Q100
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74HCT2G32DP-Q100 Datasheet PDF : 12 Pages
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74HC2G32-Q100;
74HCT2G32-Q100
Dual 2-input OR gate
Rev. 3 — 8 February 2019
Product data sheet
1. General description
The 74HC2G32-Q100; 74HCT2G32-Q100 is a dual 2-input OR gate. Inputs include clamp diodes
that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC2G32-Q100: CMOS level
For 74HCT2G32-Q100: TTL level
Complies with JEDEC standard no. 7A
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74HC2G32DP-Q100 -40 °C to +125 °C
74HCT2G32DP-Q100
74HC2G32DC-Q100 -40 °C to +125 °C
74HCT2G32DC-Q100
Name
TSSOP8
VSSOP8
Description
Version
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1

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