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74LVC16240A-Q100

16-bit buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state

Nexperia B.V. All rights reserved 

Nexperia

74LVC16240A-Q100

16-bit buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state

10.1. Waveforms and test circuit

VI

nAn input

VM

VM

Fig. 4.

GND

VOH

nYn output

VOL

tPHL

90 %

VM

10 %

tPLH

VM

10 %

90 %

tTHL

tTLH

mgu781

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

The input nAn to output nYn propagation delays

Fig. 5.

VI

nOE input

VM

GND

VCC

output

LOW-to-OFF

OFF-to-LOW

VOL

VOH

output

HIGH-to-OFF

OFF-to-HIGH

GND

tPLZ

tPZL

tPHZ

VX

VY

VM

tPZH

VM

outputs

enabled

outputs

disabled

outputs

enabled

mna362

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

3-state enable and disable times

Table 8. Measurement points

Supply voltage

Input

VCC

1.2 V

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

VM

0.5 × VCC

0.5 × VCC

0.5 × VCC

1.5 V

3.0 V to 3.6 V

1.5 V

Output

VM

0.5 × VCC

0.5 × VCC

0.5 × VCC

1.5 V

1.5 V

VX

VOL + 0.1 V

VOL + 0.1 V

VOL + 0.1 V

VOL + 0.3 V

VOL + 0.3 V

VY

VOH - 0.1 V

VOH - 0.1 V

VOH - 0.1 V

VOH - 0.3 V

VOH - 0.3 V

74LVC16240A_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 25 April 2019

© Nexperia B.V. 2019. All rights reserved

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