74LVC16240A 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74LVC16240A
Nexperia B.V. All rights reserved
74LVC16240A Datasheet PDF : 12 Pages
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Nexperia
74LVC16240A
16-bit buffer/line driver with 5V tolerant inputs/outputs; inverting; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
Fig. 6.
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
Table 9. Test data
Supply voltage
1.2 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Input
VI
VCC
VCC
VCC
2.7 V
2.7 V
tr, tf
≤ 2 ns
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
30 pF
30 pF
50 pF
50 pF
RL
1 kΩ
1 kΩ
500 Ω
500 Ω
500 Ω
VEXT
tPLH, tPHL
open
open
open
open
open
tPLZ, tPZL
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
tPHZ, tPZH
GND
GND
GND
GND
GND
74LVC16240A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 25 April 2019
© Nexperia B.V. 2019. All rights reserved
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