74LV4060 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LV4060

14-stage binary ripple counter with oscillator

Nexperia B.V. All rights reserved 

Nexperia

74LV4060

14-stage binary ripple counter with oscillator

9,

05LQSXW

*1'

9,

56LQSXW

*1'

92+

4QRXWSXW

92/

90

W:

W3+/

90

WUHF

90

DDL

Fig 9.

Measurement points are given in Table 7.

VOL and VOH are typical voltage output levels that occur with the output load.

Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation

delays and the master reset to clock (RS) recovery time

Table 7. Measurement points

Supply voltage

VCC

< 2.7 V

2.7 V to 3.6 V

 4.5 V

Input

VM

0.5VCC

1.5 V

0.5VCC

Output

VM

0.5VCC

1.5 V

0.5VCC

9&&

9,

38/6(

*(1(5$725

92

'87

57

&/

6

5/

[9&&

RSHQ

*1'

5/

DDE

Test data is given in Table 8.

Definitions test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

RL = Load resistance.

Fig 10. Test circuit for measuring switching times

74LV4060

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 17 March 2016

© Nexperia B.V. 2017. All rights reserved

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