ISL8499 데이터 시트보기 (PDF) - Renesas Electronics
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ISL8499
Renesas Electronics
ISL8499 Datasheet PDF : 14 Pages
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ISL8499
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
SWITCH
INPUT
VNO
SWITCH
OUTPUT 0V
50%
tOFF
VOUT
90%
tON
tr < 5ns
tf < 5ns
90%
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO or NC
IN
GND
COM
VOUT
RL
CL
50
35pF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+-R---r--L---O----N-----
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
VOUT
LOGIC ON
INPUT
VOUT
OFF
Q = VOUT x CL
V+
ON
0V
RG
NO or NC
COM
VG
GND
IN
LOGIC
INPUT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
FIGURE 2B. TEST CIRCUIT
VOUT
CL
V+
C
V+
LOGIC
INPUT
0V
VNX
NO
NC
IN
COM
VOUT
RL
CL
50
35pF
SWITCH
OUTPUT
VOUT 0V
90%
LOGIC
INPUT
tD
GND
CL includes fixture and stray capacitance.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
FN6111 Rev 3.00
February 5, 2008
Page 6 of 14
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