ISL84582 데이터 시트보기 (PDF) - Renesas Electronics

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ISL84582

Low-Voltage, Single and Dual Supply, Differential 4-to-1 Multiplexer

Renesas Electronics 

ISL84582

Test Circuits and Waveforms (Continued)

3V

LOGIC

INPUT

0V

VNO0

SWITCH

OUTPUT

0V

VNOX

50%

tTRANS

VOUT

tr < 20ns

tf < 20ns

90%

10%

C

V+

V-

C

LOGIC

INPUT

V+

C

V-

C

NO0x

NO3x

NO1x-NO2x

ISL84582

COMx

ADDA-B GND EN

VOUT

RL

300

CL

35pF

tTRANS

Logic input waveform is inverted for switches that have the opposite

logic sense.

Repeat test for other switches. CL includes fixture and stray

capacitance.

VOUT = V(NO or NC) -R----L----R-+----Lr---O----N--

FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS

FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT

FIGURE 1. SWITCHING TIMES

V+

C

V-

C

LOGIC OFF

INPUT

ON

SWITCH

OUTPUT

VOUT

3V

OFF

0V

VOUT

RG

NO OR NC

0

COM

ADDX

VG

GND INH

LOGIC

INPUT

Q = VOUT x CL

FIGURE 2A. Q MEASUREMENT POINTS

Repeat test for other switches.

FIGURE 2B. Q TEST CIRCUIT

FIGURE 2. CHARGE INJECTION

VOUT

CL

1nF

V+

C

V-

C

3V

LOGIC

INPUT

0V

tr < 20ns

tf < 20ns

C

V+

COMx

NO0x-NO3x

ISL84582

ADDA-B

VOUT

RL

300

CL

35pF

SWITCH

OUTPUT

VOUT

0V

tBBM

80%

LOGIC

INPUT

GND INH

Repeat test for other switches. CL includes fixture and stray

capacitance.

FIGURE 3A. tBBM MEASUREMENT POINTS

FIGURE 3B. tBBM TEST CIRCUIT

FIGURE 3. BREAK-BEFORE-MAKE TIME

FN6213 Rev 3.00

May 6, 2009

Page 8 of 14

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