D4564163G5 데이터 시트보기 (PDF) - Elpida Memory, Inc

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D4564163G5

64M-bit Synchronous DRAM 4-bank, LVTTL

Elpida Memory, Inc 

µPD4564441, 4564841, 4564163

Self refresh entry command

(/CS, /RAS, /CAS, CKE = Low, /WE = High)

After the command execution, self refresh operation continues while

CKE remains low. When CKE goes high, the µPD4564xxx exits the self

refresh mode.

During self refresh mode, refresh interval and refresh operation are

performed internally, so there is no need for external control.

Before executing self refresh, all banks must be precharged.

Fig.7 Self refresh entry command

CLK

CKE

/CS

/RAS

/CAS

/WE

A12, A13

(Bank select)

A10

Add

Burst stop command

(/CS, /WE = Low, /RAS, /CAS = High)

This command can stop the current burst operation.

Fig.8 Burst stop command in Full

Page Mode

CLK

CKE H

/CS

/RAS

/CAS

/WE

A12, A13

(Bank select)

A10

Add

No operation

(/CS = Low, /RAS, /CAS, /WE = High)

This command is not an execution command. No operations begin or

terminate by this command.

Fig.9 No operation

CLK

CKE H

/CS

/RAS

/CAS

/WE

A12, A13

(Bank select)

A10

Add

Data Sheet E0149N10

13

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