SL4060BN 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL4060BN
System Logic Semiconductor
SL4060BN Datasheet PDF : 5 Pages
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SL4060B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C Unit
fmax Maximum Clock Frequency (50% Duty Cycle)
5.0 3.5
3.5
1.75 MHz
(Figure 1)
10
8
8
4
15
12
12
6
tPHL, tPLH Maximum Propagation Delay, Clock to Q4
(Figure 1)
5.0 740
10
300
15
200
740
1480
ns
300
600
200
400
tPHL, tPLH Maximum Propagation Delay, Qn to Qn+1 (Figure 5.0
200
200
400
ns
2)
10
100
100
200
15
80
80
160
tPHL Maximum Propagation Delay, Reset to Any Q
5.0 360
360
720
ns
(Figure 3)
10
160
160
320
15
100
100
200
tTHL, tTLH Maximum Output Transition Time, Any Output 5.0
200
200
400
ns
(Figure 1)
10
100
100
200
15
80
80
160
CIN
Maximum Input Capacitance
-
7.5
pF
TIMING REQUIREMENTS(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol
Parameter
tw
Minimum Pulse Width, Clock (Figure 1)
tw
Minimum Pulse Width, Reset (Figure 3)
tf, tr Maximum Input Rise and Fall Times (Figure 1)
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C Unit
5.0 100
100
200
ns
10
40
40
80
15
30
30
60
5.0 120
120
240
ns
10
60
60
120
15
40
40
80
5.0
ns
10
Unlimited
15
SLS
System Logic
Semiconductor
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