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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

SL4052BD 데이터 시트보기 (PDF) - System Logic Semiconductor

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SL4052BD Datasheet PDF : 6 Pages
1 2 3 4 5 6
SL4052B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The SL4052B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if VCC - GND = 3V, a
VCC - VEE of up to 13 V can be controlled; for VCC - VEE level differences
above 13V a VCC - GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full VCC -GND and VCC - VEE supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The SL4052 is a differential 4-channel multiplexer having two binary
control inputs. A and B, and an enable input. The two binary input
signals select 1 of 4 pairs of channels to turned on and connect the
analog inputs to the outputs.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
µA at 18 V over full package-temperature range; 100 nA at 18 V and
25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4052BN Plastic
SL4052BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
PIN 16 =VCC
PIN 7 = VEE
PIN 8 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Control Inputs
Enable
Select
B
A
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
X = don’t care
ON
Channels
Y0 X0
Y1 X1
Y2 X2
Y3 X3
None

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