CS8135 데이터 시트보기 (PDF) - ON Semiconductor
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CS8135 Datasheet PDF : 8 Pages
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Application Notes: continued
ommended value and work towards a less expensive
alternative part for each output.
Step 1: Place the completed circuit with the tantalum
capacitors of the recommended values in an environmen-
tal chamber at the lowest specified operating temperature
and monitor the outputs with an oscilloscope. A decade
box connected in series with capacitor C2 will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load on
the output under observation and look for oscillations on
the output. If no oscillations are observed, the capacitor is
large enough to ensure a stable design under steady state
conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the output at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage condi-
tions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capaci-
tor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operat-
ing conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regula-
tor performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ±20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low temper-
atures. The ESR of the capacitor should be less than 50% of
the maximum allowable ESR found in step 3 above.
Repeat steps 1 through 7 with the capacitor on the other
output, C3.
Calculating Power Dissipation
in a Dual Output Linear Regulator
The maximum power dissipation for a dual output regu-
lator (Figure 1) is:
PD(max) = {VIN(max)-VOUT1(min)}IOUT1(max)+
{VIN(max)-VOUT2(min)}IOUT2(max)+VIN(max)IQ
(1)
Where
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1,
VOUT2(min) is the minimum output voltage from VOUT2,
IOUT1(max) is the maximum output current for the
application,
IOUT2(max) is the maximum output current, for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum permis-
sible value of RΘJA can be calculated:
RΘJA =
150°C - TA
PD
(2)
The value of RΘJA can then be compared with those in
the package section of the data sheet. Those packages
with RΘJA's less than the calculated value in equation 2
will keep the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IIN
VIN
Smart
Regulator
}Control
Features
IQ
IOUT1
IOUT2
VOUT1
VOUT2
Figure 1: Dual output regulator with key performance parameters
labeled.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
summed to determine the value of RΘJA.
RΘJA = RΘJC + RΘCS + RΘSA
(3)
where
RΘJC = the junction-to-case thermal resistance,
RΘCS = the case-to-heatsink thermal resistance, and
RΘSA = the heatsink-to-ambient thermal resistance.
RΘJC appears in the package section of the data sheet. Like
RΘJA, it too is a function of package type. RΘCS and RΘSA
are functions of the package type, heatsink and the inter-
face between them. These values appear in heat sink data
sheets of heat sink manufacturers.
7
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