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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

CA3127MZ 데이터 시트보기 (PDF) - Renesas Electronics

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CA3127MZ
Renesas
Renesas Electronics Renesas
CA3127MZ Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
CA3127
Electrical Specifications
TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Input Resistance
Output Resistance
Common-Emitter Configuration
VCE = 6V, IC = 1mA, f = 200 MHz
-
400
-
-
4.6
-
k
Input Capacitance
-
3.7
-
pF
Output Capacitance
-
2
-
pF
Magnitude of Forward Transadmittance
-
24
-
mS
NOTE:
3. When used as a zener for reference voltage, the device must not be subjected to more than 0.1mJ of energy from any possible capacitance or
electrostatic discharge in order to prevent degradation of the junction. Maximum operating zener current should be less than 10mA.
Test Circuits
V+
10k
BIAS-CURRENT
ADJ
470
RL
pF 0.01
F 1F
2
VO
51
6
4
Q2
0.01F
8
Q3 470pF
3
1F
470pF
0.01
F
7
VI GEN
FIGURE 1. VOLTAGE-GAIN TEST CIRCUIT USING CURRENT-MIRROR BIASING FOR Q2
SHIELD
C2
12
(NOTE 5)
VI 1000pF
0.3H
4
1.8pF C1
(NOTE 5)
Q5
14
2
13 620
1000
pF
Q2
560
3
OHMITE
Z144
8
6
25k
Q3
1000 7
5
pF
1.5 - 8pF
VO
8.2
k0.47H
1000
pF
TEST
POINT
750
1%
1000
pF
NOTES:
+12V
4. This circuit was chosen because it conveniently
represents a close approximation in performance to a
properly unilateralized single transistor of this type. The
use of Q3 in a current-mirror configuration facilitates
simplified biasing. The use of the cascode circuit in no
way implies that the transistors cannot be used
individually.
5. E.F. Johnson number 160-104-1 or equivalent.
FIGURE 2. 100MHz POWER-GAIN AND NOISE-FIGURE TEST CIRCUIT
FN662 Rev.5.00
Jun 5, 2006
Page 3 of 9

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