UT62257C(2001) 데이터 시트보기 (PDF) - Utron Technology Inc
부품명
상세내역
일치하는 목록
UT62257C Datasheet PDF : 12 Pages
| |||
Rev. 1.0
UTRON
UT62257C
32K X 8 BIT LOW POWER CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2,4)
tRC
Address
DOUT
tAA
tOH
tOH
Data Valid
READ CYCLE 2 ( CE1 and CE2 Controlled) (1,3,5,6)
t RC
Address
CE1
t AA
t ACE1
CE2
Dout
t CLZ1
t CLZ2
HIGH-Z
t ACE2
t OH
t CHZ1
t CHZ2
Data Valid
HIGH-Z
Notes :
1. WE is HIGH for read cycle.
2. Device is continuously selected CE1 =VIL., CE2= VIH
3. Address must be valid prior to or coincident with CE1 ,CE2 transition; otherwise tAA is the limiting parameter.
5. tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
6. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ.
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
P80062
Share Link: 