PDSP16116 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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PDSP16116

16 by 16 Bit Complex Multiplier

Zarlink Semiconductor Inc 

CEX

XR

REG

XI

REG

PDSP16116/A/MC

YR

YI

CEY

REG

REG

C

C

C

C

O

16X16

O

16X16

O

16X16

O

16X16

M

MULT

M

MULT

M

MULT

M

MULT

P

P

P

P

'1'

MUX

MUX

MUX

MUX

REG

REG

REG

REG

ROUND

WTA

AR15:13

WTB

AI15:13

SOBFP

EOPSS

SFTR

SFTA

GWR4:0

WTOUT

OVR

ADD/SUB

CONX

SHIFT

REG

DECODE

OER

MUX

PR

Figure 2 - Block Diagram

ADD/SUB

CONY

SHIFT

REG

MUX

OSEL

OEI

PI

3

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