NJU3102L 데이터 시트보기 (PDF) - Japan Radio Corporation
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NJU3102L Datasheet PDF : 22 Pages
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NJU3102
PRELIMINARY
4-BIT SINGLE CHIP TINY CONTROLLER
s GENERAL DESCRIPTION
The NJU3102 is the C-MOS 4-bit Single Chip Tiny
Controller consisting of the 4-bit CPU Core, Input / Output
Selectable I/O ports, Program ROM, Data RAM, and
Oscillator Circuit (CR or Ceramic or X'tal). It is packaged
in 22-pin package (SDIP or SOP form). Therefore it
provides a cost and space effective replacement with only
few external components for control-logic circuit using
standard logic ICs (i.e. 74HC) or other small controllers.
The NJU3102 is suitable for battery operated
appliances because of low operating current, wide
operating voltage range, and STANDBY function (HALT
mode).
s PACKAGE OUTLINE
NJU3102L
NJU3102G
s FEATURES
s PIN CONFIGURATION
q Internal Program ROM 1024 X 8 bits
q Internal Data RAM
32 X 4 bits
q Input / Output Port
16 lines
PD3
(Input / Output direction of each PORT is selected by the
mask option.)
PE0
q High Output Current terminal (4 lines)
PE1
N-Channel FET Open Drain Type (IOL)
15mA at VDD=5V
PA0
q Instruction Set
58 instructions
PA1
q Subroutine Nesting
8 levels
q Pulse Edge Detector
PA2
The rising or falling edge of a pulse is selected by the mask PA3
option.
q Instruction Executing Time
q Operating Frequency Range
q Internal Oscillator
6/fOSC sec
30kHz−4MHz
TEST
OSC1
CR, or Ceramic, or X'tal oscillation and External clock input OSC2
q STANDBY function (HALT mode)
q Wide operating voltage range 2.4V−5.5V
VSS
q C-MOS technology
q Package outline
DIP22 / DMP22
1
22
2
21
3
20
4
19
5
18
6
17
7
16
8
15
9
14
10
13
11
12
VDD
PD2
PD1
PD0
PC1
PC0
PB3
PB2
PB1
PB0
RESET
26/Mar/2001
-1-
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