GS820E32AT-150I 데이터 시트보기 (PDF) - Giga Semiconductor

부품명

상세내역

일치하는 목록

GS820E32AT-150I

64K x 32 2M Synchronous Burst SRAM

Giga Semiconductor 

TQFP Pin Description

Pin Location

37, 36

35, 34, 33, 32, 100, 99, 82, 81, 44, 45,

46, 47, 48, 49

52, 53, 56, 57, 58, 59, 62, 63

68, 69, 72, 73, 74, 75, 78, 79

2, 3, 6, 7, 8, 9, 12, 13

18, 19, 22, 23, 24, 25, 28, 29

16, 38, 39, 42, 43, 66, 50, 51, 80, 1, 30

87

93, 94

95, 96

89

88

98, 92

97

86

83

84, 85

64

14

31

15, 41, 65, 91

5,10,17, 21, 26, 40, 55, 60, 67, 71, 76, 90

4, 11, 20, 27, 54, 61, 70, 77

Symbol

A0, A1

A2-15

DQA1-DQA8

DQB1-DQB8

DQC1-DQC8

DQD1-DQD8

NC

BW

BA, BB

BC, BD

CK

GW

E1, E3

E2

G

ADV

ADSP, ADSC

ZZ

FT

LBO

VDD

VSS

VDDQ

Type

I

I

I/O

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

GS820E32AT/Q-150/138/133/117/100/66

Description

Address field LSB’s and Address Counter preset Inputs

Address Inputs

Data Input and Output pins.

No Connect

Byte Write. Writes all enabled bytes. Active Low.

Byte Write Enable for DQA, DQB Data I/O’s. Active Low.

Byte Write Enable for DQC, DQD Data I/O’s. Active Low.

Clock Input Signal. Active High.

Global Write Enable. Writes all bytes. Active Low.

Chip Enable. Active Low.

Chip Enable. Active High.

Output Enable. Active Low.

Burst address counter advance enable. Active Low.

Address Strobe (Processor, Cache Controller). Active Low.

Sleep Mode control. Active High.

Flow Through or Pipeline mode. Active Low.

Linear Burst Order mode. Active Low.

Core power supply.

I/O and Core Ground.

Output driver power supply.

E

Rev: 1.04 3/2000

3/23

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2000, Giga Semiconductor, Inc.

E

Share Link: