GTL2008 데이터 시트보기 (PDF) - NXP Semiconductors.

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GTL2008

12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs

NXP Semiconductors. 

NXP Semiconductors

GTL2008

GTL translator with power good control and high-impedance outputs

6. Pinning information

6.1 Pinning

VREF 1

1AO 2

2AO 3

5A 4

6A 5

EN1 6

11BI 7

11A 8

9BI 9

3AO 10

4AO 11

10AI1 12

10AI2 13

GND 14

GTL2008PW

28 VCC

27 1BI

26 2BI

25 7BO1

24 7BO2

23 EN2

22 11BO

21 5BI

20 6BI

19 3BI

18 4BI

17 10BO1

16 10BO2

15 9AO

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Fig 2. Pin configuration for TSSOP28

6.2 Pin description

Table 3.

Symbol

VREF

1AO

2AO

5A

6A

EN1

11BI

11A

9BI

3AO

4AO

10AI1

10AI2

GND

9AO

10BO2

10BO1

4BI

3BI

Pin description

Pin

Description

1

GTL reference voltage

2

data output (LVTTL), open-drain

3

data output (LVTTL), open-drain

4

data input/output (LVTTL), open-drain

5

data input/output (LVTTL), open-drain

6

enable input (LVTTL)

7

data input (GTL)

8

data input/output (LVTTL), open-drain

9

data input (GTL)

10

data output (LVTTL), open-drain

11

data output (LVTTL), open-drain

12

data input (LVTTL)

13

data input (LVTTL)

14

ground (0 V)

15

data output (LVTTL), 3-state

16

data output (GTL)

17

data output (GTL)

18

data input (GTL)

19

data input (GTL)

GTL2008_4

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 04 — 19 February 2010

© NXP B.V. 2010. All rights reserved.

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