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PI6C2520

Low-Noise Phase-Locked Loop Clock Driver with 20 Clock Outputs

Pericom Semiconductor 

PI6C2520

Low-Noise, Phase-Locked Loop

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Parameter Measurement Information

From Output

Under Test

22pF

500Ω

Load Circuit

Input

50% VCC

3V

50% VCC

0V

tpd

Output

80%

20%

50% VCC

80%

VOH

20% VOL

tr

tf

Voltage Waveforms

Propagation Delay times

Notes:

1. CL includes probe and jig capacitance.

2. All input pulses are supplied by generators having the following characteristics: CLK_IN ≤ 100MHz, ZO = 50 ohms, tr ≤ 1.2ns, tf ≤ 1.2ns.

3. The outputs are measured one at a time with one transition per measurement.

CLK_IN

FB_IN

FB_OUT

Any Y

Any Y

Any Y

tphase error

tsk(O)

tsk(O)

Phase Error and Skew Calculations

5

PS8435B 07/25/00

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