Signal
RSCK
SA0
SA1
SA2
SCL
SDA
SIN
SOUT
SVDD
SWP
VCMOS
VDD
VREF
Module
Connector Pads
I/O
A59
I
B53
I
B55
I
B57
I
A53
I
A55
I/O
B36
I/O
A36
I/O
A56, B56
—
A57
I
A35, B35, A37, B37
—
A41, A42, A54, A58, B41,
B42, B54, B58
—
A51, B51
—
EBR25UC8ABFD
Type
VCMOS
SVDD
SVDD
SVDD
SVDD
SVDD
VCMOS
VCMOS
—
SVDD
—
—
—
Description
Serial clock input. Clock source used to read from and
write to the RDRAM control registers.
Serial Presence Detect Address 0.
Serial Presence Detect Address 1.
Serial Presence Detect Address 2.
Serial Presence Detect Clock.
Serial Presence Detect Data (Open Collector I/O).
Serial I/O for reading from and writing to the control
registers. Attaches to SIO0 of the first RDRAM on the
module.
Serial I/O for reading from and writing to the control
registers. Attaches to SIO1 of the last RDRAM on the
module.
SPD Voltage. Used for signals SCL, SDA, SWP, SA0,
SA1 and SA2.
Serial Presence Detect Write Protect (active high).
When low, the SPD can be written as well as read.
CMOS I/O Voltage. Used for signals CMD, SCK, SIN,
SOUT.
Supply voltage for the RDRAM core and interface
logic.
Logic threshold reference voltage for RSL signals.
Data Sheet E0317E20 (Ver. 2.0)
5