EL4501 데이터 시트보기 (PDF) - Renesas Electronics

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EL4501

Video Front End

Renesas Electronics 

EL4501

RFREQ

An external RFREQ resistor, connected from pin 7 to ground,

produces a reference current that is used internally as the

timing reference for all the sync output delay time and output

pulse widths. Decreasing the value of RFREQ increases the

reference current and frequency of the internal oscillator, which

in turn decreases the reference time and pulse width. A higher

frequency video input requires a lower RFREQ value. The Line

Rates vs RFREQ performance curve shows the variation of line

rate with RFREQ.

Slice Mode and Operation with VCRs

Normally the signal source for the EL4501 is assumed to be

clean and relatively noise free. If that is the case, the SLICE

MODE pin (pin 16) should be connected to ground, which sets

the slice level to 50% of the sync tip. Some signal sources may

have excessive video peaking, causing high frequency video

and chroma components to extend below the black level

reference, such as VCR signals which generate lots of head

switching noise. In this case, the SLICE MODE pin should be

connected to logic high which sets the slice level to a fixed

100mV above the sync tip. Also, a single pole chroma filter is

required at the composite video input to increase the S/N ratio

of the incoming noisy video signal. When the source

impedance is low, typically 75, a 620 resistor in series with

the source and 470pF capacitor to ground will form a low pass

filter with a roll-off frequency of about 550kHz. This bandwidth

sufficiently attenuates the 3.58MHz (NTSC) or 4.43MHz (PAL)

color burst signal and high frequency spikes, yet passes the

sync pulse portion without appreciable attenuation. The

chroma filter will increase the propagation delay from the

composite sync input to the outputs. Applying a chroma filter,

setting the SLICE MODE pin and FSEL pin to high greatly

improve the noise immunity performance in VCR applications.

Output Drive Capability

The outputs of the sync separator are not designed to drive

heavy loads. For a 5V VDS, if the output is driving 5k load to

ground, the output high voltage is about 4.9V. If the output is

driving 500 load, the output high voltage is down to 4.2V.

General

Power Dissipation

With the high output drive capability of the EL4501 video

amplifier, it is possible to exceed the 125°C Absolute Maximum

junction temperature under certain load current conditions. It is

important to calculate the maximum junction temperature for a

given application to determine if load conditions or package

type need to be modified for the amplifier to remain in its safe

operating region.

The maximum power dissipation allowed in a package is

determined according to:

PDMAX

=

T----J---M-----A----X-----------T----A----M----A----X--

JA

where:

• TJMAX = Maximum junction temperature (125°C)

• TAMAX = Maximum ambient temperature (85°C)

• JA = Thermal resistance of the package

• PDMAX = Maximum power dissipation in the package

The maximum power dissipation actually produced by an IC is

the product of total quiescent supply current and power supply

voltage, plus the power in the IC due to the load. Assume no

load at the sync separator outputs:

PDMAX = VS  ISMAX + VSD  ISDMAX +

VS

-

VOUT 



V-----O----U----T--

RL

where:

• VS = Supply voltage

• VSD = Digital supply

• ISMAX = Maximum supply current

• ISDMAX = Maximum digital supply current

• VOUT = Maximum output voltage

• RL = Load resistance tied to ground

Board Layout

As with any high frequency device, good printed circuit board

layout is necessary for optimum performance. Ground plane

construction is highly recommended. Lead lengths should be

as short as possible. The power supply pin must be well

bypassed to reduce the risk of oscillation. In normal operation,

where the GND pin is connected to the ground plane, a single

4.7µF tantalum capacitor in parallel with a 0.1µF ceramic

capacitor from VS to GND will suffice. To reduce cross talk

between the analog signal path and the embedded sync

separator, a separate digital supply pin, VSD is included on the

EL4501. This pin should be bypassed in a similar manner to

VS. For additional isolation a ferrite bead may be added in line

with the supply connections to both pins. For good AC

performance, parasitic capacitance should be kept to a

minimum. Use of wire wound resistors should be avoided

because of their additional series inductance.

FN7327 Rev 3.00

November 12, 2010

Page 19 of 20

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