EL4585 데이터 시트보기 (PDF) - Renesas Electronics

부품명

상세내역

일치하는 목록

EL4585

Horizontal Genlock, 8FSC

Renesas Electronics 

EL4585

Timing Diagrams

H-SYNC

(INPUT)

~200ns ± 50ns

EXT. DIV.

(INPUT OR

OUTPUT)

PLL LOCKED CONDITION (PHASE ERROR = 0)

HSYNC

EXT. DIV

-

CHARGE

PUMP

+

-OFF

~200ns

tH

t0

+

E = ttH  360°

tH = HSYNC PERIOD

t = PHASE ERROR PERIOD

OFF

OUT OF LOCK CONDITION

Test Circuit

+

VOU-T

3

VIN

0.1µF

5

10mVRMS

TEST CIRCUIT 1

FN7175 Rev 4.00

September 3, 2009

Page 5 of 15

Share Link: