CXD2464R 데이터 시트보기 (PDF) - Sony Semiconductor

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CXD2464R

Timing Generator for LCD Panels

Sony Semiconductor 

CXD2464R

Pin

No.

Symbol

34 VST

35 TST14

36 PCG

37 DWN

38 HD

39 CLP1

40 VSS2

41 CLP2/FLDO

42 PRG

43 FRP

44 XFRP

45 SHPA

46 SHPB

47 SHPC

48 SHPD

49 INV

50 XVS

51 XHS

52 IRACT

53 ORACT

54 RSTR

55 VSS3

56 VDD1

57 RCK

58 RSTW

59 WCK

60 SCTR

61 SCLK

62 SDAT

63 HDN

64 CKI1

I/O

Description

Input pin for

open status

O VST pulse output

—

— Test pin (Not connected.)

—

O PCG pulse output

—

O

Up/down inversion discrimination signal output

(H output: Down, L output: Up)

—

O HD pulse output

—

O Pedestal clamp pulse 1 output

—

— GND

—

O Pedestal clamp pulse 2 output/FLDO pulse output

—

O Precharge signal pulse output

—

O AC drive inversion timing output

—

O AC drive inversion timing output (reverse polarity of FRP)

—

O External sample-and-hold driver control signal (for CXA2112R)

—

O External sample-and-hold driver control signal (for CXA2112R)

—

O External sample-and-hold driver control signal (for CXA2112R)

—

O External sample-and-hold driver control signal (for CXA2112R)

—

O External sample-and-hold driver control signal (for CXA2112R)

—

O Auxiliary pulse output for CXD2449Q

—

O Auxiliary pulse output for CXD2449Q

—

O Auxiliary pulse output for scan converter

—

O Auxiliary pulse output for scan converter

—

O Reset read output (for high-speed line buffer)

—

— GND

—

— VDD

—

O Read clock output (for high-speed line buffer)

—

O Reset write output (for high-speed line buffer)

—

O Write clock output (for high-speed line buffer)

—

I Chip select input pin (serial transfer block)

—

I Serial clock input pin (serial transfer block)

—

I Serial data input pin (serial transfer block)

—

O Phase comparator pulse output

—

I Clock 1 input pin

—

∗ H: Pull up, L: Pull down

–4–

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