SRDA05-4.TB 데이터 시트보기 (PDF) - Semtech Corporation
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SRDA05-4.TB Datasheet PDF : 10 Pages
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SRDA3.3-4 through SRDA12-4
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Four
High-Speed Lines
The SRDA TVS is designed to protect four data lines
from transient overvoltages by clamping them to a
fixed reference. When the voltage on the protected
line exceeds the reference voltage (plus diode VF) the
steering diodes are forward biased, conducting the
transient current away from the sensitive circuitry.
Data lines are connected at pins 1, 4, 6 and 7. The
negative reference is connected at pins 5 and 8.
These pins should be connected directly to a ground
plane on the board for best results. The path length is
kept as short as possible to minimize parasitic induc-
tance.
The positive reference is connected at pins 2 and 3.
The options for connecting the positive reference are
as follows:
Data Line and Power Supply Protection Using Vcc as
reference
Data Line Protection with Bias and Power Supply
Isolation Resistor
1. To protect data lines and the power line, connect
pins 2 & 3 directly to the positive supply rail (VCC).
In this configuration the data lines are referenced
to the supply voltage. The internal TVS diode
prevents over-voltage on the supply rail.
2. The SRDA can be isolated from the power supply by
adding a series resistor between pins 2 and 3 and
VCC. A value of 10kΩ is recommended. The
internal TVS and steering diodes remain biased,
providing the advantage of lower capacitance.
3. In applications where no positive supply reference
is available, or complete supply isolation is desired,
the internal TVS may be used as the reference. In
this case, pins 2 and 3 are not connected. The
steering diodes will begin to conduct when the
voltage on the protected line exceeds the working
voltage of the TVS (plus one diode drop).
ESD Protection With RailClamps
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout,
these devices virtually eliminate the disadvantages of
using discrete components to implement this topology.
Consider the situation shown in Figure 1 where dis-
crete diodes or diode arrays are configured for rail-to-
rail protection on a high speed line. During positive
duration ESD events, the top diode will be forward
biased when the voltage on the protected line exceeds
the reference voltage plus the V drop of the diode.
For negative events, the bottom Fdiode will be biased
when the voltage exceeds the V of the diode. At first
F
Data Line Protection Using Internal TVS Diode as
Reference
2003 Semtech Corp.
5
www.semtech.com
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