MC10135 데이터 시트보기 (PDF) - ON Semiconductor

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MC10135

Dual J-K Master-Slave Flip-Flop

ON Semiconductor 

MC10135

ELECTRICAL CHARACTERISTICS (continued)

TEST VOLTAGE VALUES (Volts)

@ Test Temperature

–30°C

VIHmax

–0.890

VILmin

–1.890

VIHAmin

–1.205

VILAmax

–1.500

VEE

–5.2

+25°C –0.810 –1.850 –1.105

–1.475

–5.2

+85°C –0.700 –1.825 –1.035

–1.440

–5.2

Characteristic

Power Supply Drain Current

Input Current

Symbol

IE

IinH

Pin

Under

Test

8

6,7,9,10,11

4,5,12,13

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

VIHmax

VILmin

VIHAmin

VILAmax

VEE

8

Note 1.

8

Note 1.

8

(VCC)

Gnd

1, 16

1, 16

1, 16

IinL

4,5,6,7,9,

10,11,12,13

Note 2.

Note 2.

8

1, 16

8

1, 16

Output Voltage

Logic 1 VOH

2

5

2 (3.)

6

8

1, 16

8

1, 16

Output Voltage

Logic 0 VOL

3

5

3 (3.)

6

8

1, 16

8

1, 16

Threshold Voltage

Logic 1 VOHA

2

5

2 (4.)

6

8

1, 16

8

1, 16

Threshold Voltage

Logic 0 VOLA

3

5

3 (4.)

6

8

1, 16

8

1, 16

Switching Times

Clock Input

(50Ω Load)

Pulse In Pulse Out –3.2 V +2.0 V

Propagation Delay t9+2+

2

t9+2–

2

Rise Time

(20 to 80%) t2+, t3+

2, 3

Fall Time

(20 to 80%) t2–, t3–

2, 3

9

2

8

1, 16

9

2

8

1, 16

9

2, 3

8

1, 16

9

2, 3

8

1, 16

Set Input

Propagation Delay t5+2+

2

t12+15+

15

t5+3–

3

t12+14–

14

5

2

8

1, 16

12

15

8

1, 16

5

3

8

1, 16

12

14

8

1, 16

Reset Input

Propagation Delay t4+2–

2

t4+3–

3

t13+15–

15

t13+14+

14

4

2

8

1, 16

4

3

8

1, 16

13

15

8

1, 16

13

14

8

1, 16

Setup Time

tsetup

7

6, 9

2

8

1, 16

Hold Time

thold

7

6, 9

2

8

1, 16

Toggle Frequency (Max)

ftog

2

9

2

8

1, 16

1. Individually test each input; apply VIHmax to pin under test.

2. Individually test each input; apply VILmin to pin under test.

3. Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)

VIHmax

VILmin

4. Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)

VIHAmax

VILAmin

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been

established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.

Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the

same manner.

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