HSP50210 데이터 시트보기 (PDF) - Renesas Electronics
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HSP50210 Datasheet PDF : 51 Pages
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HSP50210
0
-20
-40
-60
-80
-100
0
fCLK
2fCLK
3fCLK
4fCLK
fCLK
10
10
10
10
2
FREQUENCY (NORMALIZED TO INPUT SAMPLE RATE)
FIGURE 4. RRC FILTER IN HSP50210
0
-0.18
-0.36
-0.54
SHOWN BELOW
ENLARGED FOR CLARITY
-0.72
-0.90
0
0
fCLK
25
2fCLK
25
3fCLK
25
4fCLK
25
fCLK
5
-0.07
-0.14
-0.21
-0.28
-0.35
0
fCLK
40
fCLK
20
3fCLK
40
fCLK
10
5fCLK 3fCLK
40
20
FREQUENCY (NORMALIZED TO INPUT SAMPLE RATE)
FIGURE 5. PASSBAND RIPPLE OF RRC FILTER IN HSP50210
FN3652 Rev.5.00
Jul 2, 2008
TABLE 1. ROOT RAISED COSINE COEFFICIENTS
COEFFICIENT INDEX
COEFFICIENT
0
2
1
-2
2
1
3
8
4
-16
5
-14
6
86
7
160
8
86
9
-14
10
-16
11
8
12
1
13
-2
14
2
The I and D filter consists of an accumulator, a
programmable shifter and a two sample summer, as shown
in Figure 3. The programmable shifter is provided to
compensate for the gain introduced by the accumulator (see
Table 15). The accumulator provides Integrate and Dump
Filtering for decimation factors up to 16. The two sample
summer provides the moving average required for an
additional decimation factor of 2. A decimation factor of 1
(bypass), 2, 4, 8, 16, or 32 may be selected. At the maximum
decimation rate, a baseband signal sampled at 32x the
symbol rate can be filtered.
The output of the two sample summer is demultiplexed into
two sample streams at the symbol rate. The demultiplexed
data streams from the I and Q processing paths are fed to
the Symbol Tracking Block and Soft decision slicer. The
multiplexed data streams on I and Q are provided as one of
the selectable inputs for the Cartesian-to-Polar Converter.
Cartesian/Polar Converter
The Cartesian/Polar Converter maps samples on the I and Q
processing paths to their equivalent phase/magnitude
representation. The magnitude conversion is equivalent to
Equation 5:
Mag (I, Q) = 0.81 I2 + Q2
(EQ. 5)
where 0.81 is the gain of the conversion process. The
magnitude output is an 8-bit unsigned value ranging from 0.0
to 1.9922.
Page 9 of 51
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