XE3005 데이터 시트보기 (PDF) - Unspecified

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XE3005

Low-Power Audio CODEC

Unspecified 

Data Sheet

XE3005/XE3006

2.1.10 Start-up and Initialization

The CODEC generates its own power on reset signal after a power supply is connected to the VDD pin. The

reset signal is made available for the user at the pin NRESET. The rising edge of the NRESET indicates that the

startup sequence of the CODEC has finished. In most applications the NRESET pin can be left open.

The NRESET signal generated by the CODEC is used to initialize the various blocks in the device and

guarantees a correct start-up of the circuit. The start-up sequence that is automatically carried out upon power-up

of the device is listed below and illustrated in Figure 10.

1) NRESET is low (0V) when the device is not powered and remains low for a short time when VDD (upper

curve in Figure 10) is applied. The low state sustains while VDD, VREG16, VREF are stabilizing.

2) As soon as the MCLK signal is present, a counter is activated that counts 221 periods of the MCLK. After this

moment the NRESET is in the high state (VDD).

VDD = 1.8..3.3V

VREG16 = 1.6V

VREF = 1.2V

time

MCLK

NRESET

...

977 ms (MCLK=2.048KHz)

main reset

Figure 10: Startup sequence and NRESET signal after power-on.

The user can use the NRESET pin in 3 different ways and combinations:

1) Leave the NRESET pin not connected. In this case the CODEC will startup as described in figure 10.

2) Use the NRESET pin as an output to indicate, to e.g. a microcontroller, that the CODEC finished its

power up sequence and that the CODEC is ready to operate.

3) Use the NRESET pin to force a re-initialisation of the registers to their default values. In this case the

user has to force the NRESET to 0V for at least 32 periods of the MCLK. The circuit which forces the

NRESET to 0V should be able to sink at least 50 uA.

10

D0212-116

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