datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

LB11850VA-W-AH 데이터 시트보기 (PDF) - ON Semiconductor

부품명
상세내역
일치하는 목록
LB11850VA-W-AH Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LB11850VA
DESCRIPTION OF PRE-DRIVER BLOCK
*1: <Power Supply-GND Wiring>
SGND is connected to the control circuit power
supply system.
*2: <Power Stabilization Capacitor>
For the signal-side power stabilization capacitor,
the capacitance of more than 0.1 mF is used.
Connect the capacitor between VCC and GND with
the thick pattern and along the shortest route.
*3: <Power-side Power Stabilization Capacitor>
For the power-side power stabilization capacitor,
the capacitance of more than 0.1 mF is used.
Connect the capacitor between power-side power
supply and GND with the thick pattern and along
the shortest route.
*4: <IN+, INPins>
Hall signal input pins.
Wiring needs to be short to prevent carrying noise.
If noise is carried, insert a capacitor between IN+
and IN. The Hall input circuit is a comparator
having a hysteresis of 15 mV.
It has a ±30 mV (input signal difference voltage)
soft switch zone.
It is recommended that the Hall input level is
100 mV (pp) at the minimum.
*5: <CPWM Pin>
This is the pin to connect capacitor for generating
the PWM basic frequency.
Use of CP = 220 pF produces oscillation at the
frequency of 30 kHz which serves as the PWM
basic frequency.
Since this pin is also used for the current limiter
reset signal, the capacitor must be connected
without fail even when no speed control is
implemented.
*6: <CT Pin>
This is the pin to connect capacitor for lock
detection.
Constant-current charging and constant-current
discharging circuits are incorporated. When the
pin voltage becomes 3.0 V, the safety lock is
applied, and when it lowers to 1.0 V, the lock
protection is reset.
Connect this pin to GND when it is not in use
(when lock protection is not required).
*7: <SENSE Pin>
This is the pin for current limiter detection.
When the pin voltage exceeds 0.21 V, current
limiting is applied, and the low-side regeneration
mode is established.
Connect this pin to GND when it is not in use.
*8: <RD Pin>
Lock detection pin.
This is the open collector output, which outputs
“L” during rotation and “H” at stop. This pin is left
open when it is not in use.
*9: <FG Pin>
Speed detection pin.
This is the open collector output, which can detect
the rotation speed using the FG output according
to the phase change. This pin is left open when it
is not in use.
www.onsemi.com
7

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]