CXD2073Q 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD2073Q Datasheet PDF : 11 Pages
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CXD2073Q
Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
Symbol
ADIN
ADVS
ADVD
ACO
NC
DAVD
AYO
DAVS
VRF
VG
VB
IRF
INIT
14 MOD2
15 MOD1
16 APCN
17 TST3
18
DVSS
19
DVDD
20 NC
21
DVDD
22
DVSS
23 TST2
24 TST1
25 FIN
26 CKSL
27 CPO
28 VCV
29 PLVD
30 PLVS
31 CLPEN
32 CLPO
I/O
Description
I Comb filter analog input (A/D converter input)
— Analog ground for A/D converter
— Analog power supply for A/D converter (+5V)
O Analog chroma signal output
— Leave this pin open.
— Analog power supply for D/A converter (+5V)
O Analog luminance signal output
— Analog ground for D/A converter
I D/A converter reference voltage setting. Sets the full-scale value for D/A converter.
O Connect to DAVD via a capacitor of approximately 0.1µF.
O Connect to DAVS via a capacitor of approximately 0.1µF.
O Connect a resistor of 16 times (16R) that of the output resistor "R" of AYO pin.
I Test. Normally, fix to Low.
Y/C separation status setting pins
I
MOD2 MOD1
L
L
Adaptive processing mode
L
H
BPF separation fixed mode
I
H
L
Y through mode
H
H
Simple comb mode
Aperture compensation switching
I
L: Aperture compensation OFF
H: Aperture compensation ON
O Test. Normally, leave this pin open.
— Digital ground
— Digital power supply (+5V)
— Leave this pin open.
— Digital power supply (+5V)
— Digital ground
O Test. Normally, leave this pin open.
I Test. Normally, fix to Low.
I
Clock input. Input burst-locked clock. Input fsc when the PLL is used. Input 4fsc
when the PLL is not used.
PLL control.
I
L: When the PLL is not used. The 4fsc clock input to FIN is supplied internally.
H: When the PLL is used. The 4fsc clock from VCO oscillation output is
supplied internally.
O
Phase comparison output for the internal PLL. Leave open when the PLL is not
used.
I
VCO oscillation control voltage input for the internal PLL. Connect to PLVS when
the PLL is not used.
— PLL analog power supply (+5V)
— PLL analog ground
Clamp enable
I
L: Clamp function is enabled. Set to L when the internal clamp is used.
H: Clamp function is disabled. Set to H when the internal clamp is not used.
O
Connect to ADIN when clamp circuit is used.
Leave this pin open when clamp circuit is not used.
–3–
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